The miniaturization trend – more complex technology that needs to fit in a smaller surface – affects not only the electronic product but the circuit board itself. Such demands drive the need for more advanced printed circuit boards and the use of microvias.
According to the new definition within IPC-T-50M a microvia is a blind structure with a maximum aspect ratio of 1:1, terminating on a target land with a total depth of no more than 0.25mm measured from the structure’s capture land foil to the target land.
The IPC-6012 also defines the structure of a Microvia.
- The Microvia is a blind structure with a maximum aspect ratio of 1:1 between hole diameter and depth, with a total depth of no more than 0.25 mm, when measured from the surface to the target pad or plane.
- Typically NCAB considers the dielectric thickness between surface and reference pad to be 60 – 80um.
- The diameter dimensions of the microvia have a range of 80-100 microns. The typical RATIO is between 0.6: 1 to 1: 1, ideal 0.8: 1
Electronics products are becoming increasingly complex and this increase in density means that we face challenges of miniaturization both in terms of the electronics product and the circuit board itself – all while the functionality increases.
We are seeing smaller components and smaller features and these, combined, with the shrinking real estate means that the higher density of the circuit board calls for finer track and gap and increasing number of interconnections.
The result is that we have an increasing number of holes with increasingly smaller diameters, yet no longer can the density allow for traditional plated through via holes. Such demands drive the need for microvias – laser drilled holes that are smaller mechanically drilled holes and connect selected layers (e.g. 1-2) rather than passing through and connecting all layers.
The IPC-2226 defines the structures of HDI by type, there are three types and we can observe in the images highlighted.
Those that contain a single layer of microvia on one or both sides of the core. It uses both microvias and through holes for interconnection. It is important to keep the ratio 0.8: 1 for the microvia. This structure uses ONLY blind holes NO passage to buried holes.
Are similar to type 1 in that they contain only a single layer of microvia on one or both sides of the core. It uses both microvia and through holes for interconnection, but unlike type 1 these structures also use buried holes.
Are the most complex and demanding for factories, they contain AT LEAST two layers of microvia on one or both sides of the core. As for type 2, it also uses through holes in addition to blind and buried vias.
Below are extracts from our HDI design guidelines showing some details for type I, II and III constructions. However, one important point to note regarding type III construction is that stacked structures should be limited to 2 layers of microvia and, where possible, avoid stacking on buried holes.
|Features (dimensions um)||RECOMMENDED||ADVANCED|
|A||Microvia size / diameter||100||80|
|B||Capture land||325 (class 2)|
350 (class 3)
|250* (class 2)|
250* (class 3)
|C||Target land||300 (class 2)|
325 (class 3)
|250* (class 2)|
250* (class 3)
|D||Dielectric L1 – L2 microvia||60-80||60-100|
|E||Microvia center to PTH edge||380||300|
|F||Outer layer space||100||76|
|G||Inner layer space||100||76|
|H||Microvia to buried hole||375||300|
|I||Buried hole to PTH||450||430|
|J||Pitch – internal microvia (different net)||425||325*|
|K||Pitch – outer microvia (different net)||525 (soldermask web)|
425 (no soldermask)
|L||Pitch – staggered microvia||400||225|
|M||Dielectric for internal microvia||60-80||60-100|
|N||Buried hole to buried hole||450||350*|
|O||Buried hole size / diameter||250||150|
|P||Microvia to microvia||300||220|
|Buried via target land||Buried via + 250||Buried via + 250*|
|Q||Skip via microvia size / diameter||300||200|
|R||Skip via capture land||500 (via + 200)||400 (via + 200)|
|S||Skip via target land||600 (via + 300)||500 (via + 300)|
|T||Dielectric L1-L3 skip via||200||160|
|U||Skip via to copper on L2||250||150|
* For design tighter than the given value, please consult your local NCAB technical contact to discuss specific projects case by case.
Although we continue to see both stacked and staggered designs (see image below), there has been an IPC test committee established to look into the reliability of stacked microvias for high performance products.
Failures, post manufacturing, have been reported over recent year and the problems appears to manifest itself at the bottom of one microvia and the metallurgical junction of another via or copper layer. What is known is that this trend is seen in complex stacked microvias, but not in staggered vias.
The data compiled so far seems to suggest that stacked microvias of 3 or more layer of microvia are much more likely to experience failure than staggered via structures. It is worth pointing out that the numbers are low in terms of % failure, yet when compared to similar failure rates in staggered via holes there is a marked difference.
The rule of thumb, or recommendations at this point in time seem to be that the stacked structures should be limited to 2 layers of microvia and where possible avoid stacking these on a buried via hole. If the design calls for a third layer of microvia, then this third layer shall be tracked away from the 2 microvia stack and completed as a staggered design.